SLVSF67B
August 2019 – January 2021
DRV8874-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
External Components
7.3.2
Control Modes
7.3.2.1
PH/EN Control Mode (PMODE = Logic Low)
7.3.2.2
PWM Control Mode (PMODE = Logic High)
7.3.2.3
Independent Half-Bridge Control Mode (PMODE = Hi-Z)
7.3.3
Current Sense and Regulation
7.3.3.1
Current Sensing
7.3.3.2
Current Regulation
7.3.3.2.1
Fixed Off-Time Current Chopping
7.3.3.2.2
Cycle-By-Cycle Current Chopping
7.3.4
Protection Circuits
7.3.4.1
VM Supply Undervoltage Lockout (UVLO)
7.3.4.2
VCP Charge Pump Undervoltage Lockout (CPUV)
7.3.4.3
OUTx Overcurrent Protection (OCP)
7.3.4.4
Thermal Shutdown (TSD)
7.3.4.5
Fault Condition Summary
7.3.5
Pin Diagrams
7.3.5.1
Logic-Level Inputs
7.3.5.2
Tri-Level Inputs
7.3.5.3
Quad-Level Inputs
7.4
Device Functional Modes
7.4.1
Active Mode
7.4.2
Low-Power Sleep Mode
7.4.3
Fault Mode
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Primary Application
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Current Sense and Regulation
8.2.1.2.2
Power Dissipation and Output Current Capability
8.2.1.2.3
Thermal Performance
8.2.1.2.3.1
Steady-State Thermal Performance
8.2.1.2.3.2
Transient Thermal Performance
8.2.1.3
Application Curves
8.2.2
Alternative Application
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.2.1
Current Sense and Regulation
8.2.2.3
Application Curves
9
Power Supply Recommendations
9.1
Bulk Capacitance
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
10.2.1
HTSSOP Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Community Resources
11.4
Trademarks
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PWP|16
MPDS371A
Thermal pad, mechanical data (Package|Pins)
PWP|16
PPTD312C
Orderable Information
slvsf67b_oa
1
Features
AEC-Q100 qualified for automotive applications:
Temperature grade 1: –40°C to +125°C, T
A
Functional Safety-Capable
Documentation available to aid functional safety system design
N-channel H-bridge motor driver
Drives one bidirectional brushed DC motor
Two unidirectional brushed DC motors
Other resistive and inductive loads
4.5-V to 37-V operating supply voltage range
Pin to pin R
DS(on)
variants
DRV8874-Q1
: 200-mΩ (High-Side + Low-Side)
DRV8876-Q1
: 700-mΩ (High-Side + Low-Side)
High output current capability
DRV8874-Q1
: 6-A Peak
DRV8876-Q1
: 3.5-A Peak
Integrated current sensing and regulation
Proportional current output (IPROPI)
Selectable current regulation (IMODE)
Cycle-by-cycle or fixed off time
Selectable input control modes (PMODE)
PH/EN and PWM H-bridge control modes
Independent half-bridge control mode
Supports 1.8-V, 3.3-V, and 5-V logic inputs
Ultra low-power sleep mode
<1-µA @ V
VM
= 24-V, T
J
= 25°C
Spread spectrum clocking for low electromagnetic interference (EMI)
Integrated protection features
Undervoltage lockout (UVLO)
Charge pump undervoltage (CPUV)
Overcurrent protection (OCP)
Automatic retry or outputs latched off (IMODE)
Thermal shutdown (TSD)
Automatic fault recovery
Fault indicator pin (nFAULT)