DLPS194A
November 2020 – June 2022
DLP670S
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
Storage Conditions
6.3
ESD Ratings
6.4
Recommended Operating Conditions
6.5
Thermal Information
6.6
Electrical Characteristics
6.7
Capacitance at Recommended Operating Conditions
6.8
Timing Requirements
6.9
Typical Characteristics
6.10
System Mounting Interface Loads
6.11
Micromirror Array Physical Characteristics
6.12
Micromirror Array Optical Characteristics
6.13
Window Characteristics
6.14
Chipset Component Usage Specification
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Power Interface
7.3.2
Timing
7.4
Device Functional Modes
7.5
Optical Interface and System Image Quality
7.5.1
Numerical Aperture and Stray Light Control
7.5.2
Pupil Match
7.5.3
Illumination Overfill
7.6
Micromirror Array Temperature Calculation
7.6.1
Micromirror Array Temperature Calculation using Illumination Power Density
7.6.2
Micromirror Array Temperature Calculation using Total Illumination Power
7.6.3
Micromirror Array Temperature Calculation using Screen Lumens
7.7
Micromirror Landed-On/Landed-Off Duty Cycle
7.7.1
Definition of Micromirror Landed-On/Landed-Off Duty Cycle
7.7.2
Landed Duty Cycle and Useful Life of the DMD
7.7.3
Landed Duty Cycle and Operational DMD Temperature
7.7.4
Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.3
DMD Die Temperature Sensing
9
Power Supply Recommendations
9.1
DMD Power Supply Power-Up Procedure
9.2
DMD Power Supply Power-Down Procedure
9.3
Restrictions on Hot Plugging and Hot Swapping
9.3.1
No Hot Plugging
9.3.2
No Hot Swapping
9.3.3
Intermittent or Voltage Power Spike Avoidance
10
Layout
10.1
Layout Guidelines
10.1.1
Critical Signal Guidelines
10.1.2
Power Connection Guidelines
10.1.3
Noise Coupling Avoidance
10.2
Layout Example
10.2.1
Layers
10.2.2
Impedance Requirements
10.2.3
Trace Width, Spacing
10.2.3.1
Voltage Signals
11
Device and Documentation Support
11.1
Third-Party Products Disclaimer
11.2
Device Support
11.2.1
Device Nomenclature
11.2.2
Device Markings
11.3
Documentation Support
11.3.1
Related Documentation
11.4
Receiving Notification of Documentation Updates
11.5
Support Resources
11.6
Trademarks
11.7
Electrostatic Discharge Caution
11.8
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
FYR|350
MCPG033
Thermal pad, mechanical data (Package|Pins)
Orderable Information
dlps194a_oa
1
Features
High resolution 2716 × 1600 array
>4.3 million micromirrors
0.67-inch micromirror array diagonal
5.4-micron micromirror pitch
±17.5° micromirror tilt angle (relative to flat surface)
Designed for bottom illumination
Integrated micromirror driver circuitry
Designed for use with broadband visible light
(420 nm–700 nm)
Window transmission 97% (single pass, through two window surfaces)
Micromirror reflectivity 88%
Array diffraction efficiency 84% (@f/2.4)
Array fill factor 93%
Four 16-bit, low voltage differential signaling (LVDS), double data rate (DDR) input-data buses
Driven by dual DLPC900 digital controllers
Up to 9523-Hz 1-bit patterns/second
Equivalent to 41.3 gigabits/second pixel data rate in a prestored pattern mode
Up to 1190-Hz, 8-bit gray pattern rate (prestored patterns with illumination modulation)
Up to 247-Hz, 8-bit pattern rate (external video pattern input)