SNVS801B April   2012  – January 2016 DAC101C081 , DAC101C081Q , DAC101C085

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 AC and Timing Characteristics
    7. 8.7 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 DAC Section
      2. 9.3.2 Output Amplifier
      3. 9.3.3 Reference Voltage
      4. 9.3.4 Power-On Reset
      5. 9.3.5 Simultaneous Reset
      6. 9.3.6 Additional Timing Information: toutz
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power-Down Modes
    5. 9.5 Programming
      1. 9.5.1 Serial Interface
      2. 9.5.2 Basic I2C™ Protocol
      3. 9.5.3 Standard-Fast Mode
      4. 9.5.4 High-Speed (Hs) Mode
      5. 9.5.5 I2C Slave (Hardware) Address
      6. 9.5.6 Writing to the DAC Register
      7. 9.5.7 Reading from the DAC Register
    6. 9.6 Registers
      1. 9.6.1 DAC Register
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Bipolar Operation
      2. 10.1.2 DSP/Microprocessor Interfacing
        1. 10.1.2.1 Interfacing to the 2-wire Bus
        2. 10.1.2.2 Interfacing to a Hs-mode Bus
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
    1. 11.1 Using References as Power Supplies
      1. 11.1.1 LM4132
      2. 11.1.2 LM4050
      3. 11.1.3 LP3985
      4. 11.1.4 LP2980
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Device Nomenclature
        1. 13.1.1.1 Specification Definitions
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Ensured Monotonicity to 10-bits
  • Low Power Operation: 156-µA maximum at 3.3 V
  • Extended Power Supply Range (2.7 V to 5.5 V)
  • I2C-Compatible 2-Wire Interface Which Supports Standard (100-kHz), Fast (400-kHz), and High-Speed (3.4-MHz) Modes
  • Rail-to-Rail Voltage Output
  • Very Small Package
  • DAC101C081Q is AEC Q100 Grade 1 Qualified and Manufactured on Automotive Grade Flow
  • Resolution: 10 Bits
  • INL: ±2 LSB (Maximum)
  • DNL: +0.3/-0.2 LSB (Maximum)
  • Setting Time: 6-µs (Maximum)
  • Zero Code Error: +10-mV (Maximum)
  • Full-Scale Error: −0.7 %FS (Maximum)
  • Supply Power (Normal): 380-µW (3-V) / 730-µW (5-V) Typical
  • Supply Power (Power Down): 0.5-µW (3-V) / 0.9-µW (5-V) Typical

2 Applications

  • Industrial Process Control
  • Portable Instruments
  • Digital Gain and Offset Adjustment
  • Programmable Voltage and Current Sources
  • Test Equipment
  • Automotive

3 Description

The DAC101C081 device is a 10-bit, single channel, voltage-output digital-to-analog converter (DAC) that operates from a 2.7 V to 5.5 V supply. The output amplifier allows rail-to-rail output swing and has an 6-µsec settling time. The DAC101C081 uses the supply voltage as the reference to provide the widest dynamic output range and typically consumes 132 µA while operating at 5.0 V. It is available in 6-lead SOT and WSON packages and provides three address options (pin selectable).

As an alternative, the DAC101C085 provides nine I2C™ addressing options and uses an external reference. It has the same performance and settling time as the DAC101C081 and is available in an 8-lead VSSOP.

The DAC101C081 and DAC101C085 use a 2-wire, I2C-compatible serial interface that operates in all three speed modes, including high speed mode (3.4 MHz). An external address selection pin allows up to three DAC101C081 or nine DAC101C085 devices per 2-wire bus. Pin compatible alternatives to the DAC101C081 are available that provide additional address options.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
DAC101C081 WSON (6) 2.20 mm × 2.50 mm
SOT (6) 1.60 mm × 2.90 mm
DAC101C085 VSSOP (8) 3.00 mm × 3.00 mm
DAC101C081Q WSON (6) 2.20 mm × 2.50 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Block Diagram

DAC101C081 DAC101C081Q DAC101C085 30052203.gif