SBASAF8 September   2021 ADS52J91

PRODUCTION DATA  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Description (continued)
  6. 6Device and Documentation Support
    1. 6.1 Documentation Support
    2. 6.2 Receiving Notification of Documentation Updates
    3. 6.3 Support Resources
    4. 6.4 Trademarks
    5. 6.5 Electrostatic Discharge Caution
    6. 6.6 Glossary
  7. 7Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • ZZE|198
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 16-Channel ADC configurable to convert
    8, 16, or 32 inputs
  • Maximum ADC Conversion Rate:
    • 125 MSPS in 10-bit mode
    • 100 MSPS in 12-bit mode
    • 65 MSPS in 14-bit mode
  • Supplies: 1.2 V, 1.8 V
  • Differential or single-ended input Clock
  • Signal-to-noise ratio (SNR):
    • 61 dBFS in 10-bit mode
    • 69 dBFS in 12-bit mode
    • 73.5 dBFS in 14-Bit Mode
  • Power at 125 MSPS: 48.6 mW/channel
  • 16 ADCs configurable to convert:
    • 8 Inputs with a sampling rate of a 2X ADC conversion rate
    • 16 Inputs with a sampling rate of a 1X ADC conversion rate
    • 32 Inputs with a sampling rate of a 0.5X ADC conversion rate
  • 1 Gbps LVDS interface with 16X, 14X, 12X, and 10X serialization
  • 5 Gbps JESD interface:
    • JESD204B Subclass 0, 1, and 2
    • 2, 4, or 8 Channels per JESD lane
  • Package: NFBGA-198 (9 mm × 15 mm)