SLVSE56 November   2017 TPS65320D-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Buck Regulator
        1. 7.3.1.1  Fixed-Frequency PWM Control
        2. 7.3.1.2  Slope Compensation Output
        3. 7.3.1.3  Pulse-Skip Eco-mode™ Control Scheme
        4. 7.3.1.4  Dropout Mode Operation and Bootstrap Voltage (BOOT)
        5. 7.3.1.5  Error Amplifier
        6. 7.3.1.6  Voltage Reference
        7. 7.3.1.7  Adjusting the Output Voltage
        8. 7.3.1.8  Soft-Start Pin (SS)
        9. 7.3.1.9  Overload-Recovery Circuit
        10. 7.3.1.10 Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
        11. 7.3.1.11 Overcurrent Protection and Frequency Shift
        12. 7.3.1.12 Selecting the Switching Frequency
        13. 7.3.1.13 How to Interface to RT/CLK Pin
        14. 7.3.1.14 Overvoltage Transient Protection
        15. 7.3.1.15 Small-Signal Model for Loop Response
        16. 7.3.1.16 Simple Small-Signal Model for Peak-Current Mode Control
        17. 7.3.1.17 Small-Signal Model for Frequency Compensation
      2. 7.3.2 LDO Regulator
        1. 7.3.2.1 Charge-Pump Operation
        2. 7.3.2.2 Low-Voltage Tracking
        3. 7.3.2.3 Adjusting the Output Voltage
      3. 7.3.3 Thermal Shutdown
      4. 7.3.4 Power-Good Output, nRST
      5. 7.3.5 Enable and Undervoltage Lockout
    4. 7.4 Device Functional Modes
      1. 7.4.1 Modes of Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 2.2-MHzSwitching Frequency, 9-V to 16-V Input, 5-V Output Buck Regulator, 3.3-V Output LDO Regulator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Switching Frequency Selection for the Buck Regulator
          2. 8.2.1.2.2  Output Inductor Selection for the Buck Regulator
          3. 8.2.1.2.3  Output Capacitor Selection for the Buck Regulator
          4. 8.2.1.2.4  Catch Diode Selection for the Buck Regulator
          5. 8.2.1.2.5  Input Capacitor Selection for the Buck Regulator
          6. 8.2.1.2.6  Soft-Start Capacitor Selection for the Buck Regulator
          7. 8.2.1.2.7  Bootstrap Capacitor Selection for the Buck Regulator
          8. 8.2.1.2.8  Output Voltage and Feedback Resistor Selection for the Buck Regulator
          9. 8.2.1.2.9  Frequency Compensation Selection for the Buck Regulator
          10. 8.2.1.2.10 LDO Regulator
          11. 8.2.1.2.11 Power Dissipation
            1. 8.2.1.2.11.1 Power Dissipation Losses of the Buck Regulator
          12. 8.2.1.2.12 Power Dissipation Losses of the LDO Regulator
          13. 8.2.1.2.13 Total Device Power Dissipation Losses and Junction Temperature
        3. 8.2.1.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified with the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • One High-VIN Step-Down DC-DC Converter
    • Input Range of 3.6 V to 36 V
    • 250-mΩ High-Side MOSFET
    • Maximum Load Current 3.2 A, Output Adjustable 1.1 V to 20 V
    • Adjustable Switching Frequency 100 kHz to 2.5 MHz
    • Synchronizes to External Clock
    • High Efficiency at Light Loads With Pulse-Skipping Eco-mode™ Control Scheme
    • Maximum 140-µA Operating Quiescent Current
  • One Low-Dropout Voltage (LDO) Regulator
    • Input Range of 3 V to 20 V, With Auto-Source to Balance Efficiency and Lower Standby Current
    • 280-mA Current Capability With Typical 35-µA Quiescent Current in No-Load Condition
    • Power-Good Output (Push-Pull)
    • Low-Dropout Voltage of 300 mV at
      IO = 200 mA (Typical)
  • Overcurrent Protection for Both Regulators
  • Overtemperature Protection
  • 14-Pin HTSSOP Package With PowerPAD™ Integrated Circuit Package

2 Applications

  • Automotive Infotainment and Cluster
  • Advanced Driver Assistance System (ADAS)
  • Automotive Telematics, eCall

3 Description

The TPS65320D-Q1 device is a combination of a high-VIN DC-DC step-down converter, referred to as the buck regulator, with an adjustable switch-mode frequency from 100-kHz to 2.5-MHz, and a high-VIN 280-mA low-dropout (LDO) regulator. The input range is 3.6 V to 36 V for the buck regulator, and 3 V to
36 V for the LDO regulator. The buck regulator has an integrated high-side MOSFET. The LDO regulator features a low-input supply current of 45-μA typical in no-load, also has an integrated MOSFET with an active-low, push-pull reset output pin. The input supply of the LDO regulator auto-source from the output of the buck regulator when it is in operation. Low-voltage tracking feature enables TPS65320D-Q1 to track the input supply during cold-crank conditions.

The buck regulator provides a flexible design to fit system needs. The external loop compensation circuit allows for optimization of the converter response for the appropriate operating conditions. A low-ripple pulse-skip mode reduces the no-load input-supply current to maximum 140 μA.

The device has built-in protection features such as soft start, current-limit, thermal sensing and shutdown due to excessive power dissipation. Furthermore, the device has an internal undervoltage-lockout (UVLO) function that turns off the device when the supply voltage is too low.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS65320D-Q1 HTSSOP (14) 5.00 mm × 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Schematic

TPS65320D-Q1 Typ_App_Schem_FP_TPS65320C.gif

Buck Efficiency Versus Output Current

TPS65320D-Q1 C001_slvscf0.gif