SLVSER8A
June 2020 – September 2020
TPS23734
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics: DC-DC Controller Section
7.6
Electrical Characteristics PoE
15
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
CLS Classification
8.3.2
DEN Detection and Enable
8.3.3
APD Auxiliary Power Detect
8.3.4
Internal Pass MOSFET
8.3.5
T2P and APDO Indicators
8.3.6
DC-DC Controller Features
8.3.6.1
VCC, VB, VBG and Advanced PWM Startup
28
8.3.6.2
CS, Current Slope Compensation and blanking
8.3.6.3
COMP, FB, EA_DIS, CP, PSRS and Opto-less Feedback
8.3.6.4
FRS Frequency Setting and Synchronization
8.3.6.5
DTHR and Frequency Dithering for Spread Spectrum Applications
8.3.6.6
SST and Soft-Start of the Switcher
8.3.6.7
SST, I_STP, LINEUV and Soft-Stop of the Switcher
8.3.7
Switching FET Driver - GATE, GTA2, DT
8.3.8
EMPS and Automatic MPS
8.3.9
VDD Supply Voltage
8.3.10
RTN, AGND, GND
8.3.11
VSS
8.3.12
Exposed Thermal pads - PAD_G and PAD_S
8.4
Device Functional Modes
8.4.1
PoE Overview
8.4.2
Threshold Voltages
8.4.3
PoE Start-Up Sequence
8.4.4
Detection
8.4.5
Hardware Classification
8.4.6
Maintain Power Signature (MPS)
8.4.7
Advanced Start-Up and Converter Operation
8.4.8
Line Undervoltage Protection and Converter Operation
8.4.9
PD Self-Protection
8.4.10
Thermal Shutdown - DC-DC Controller
8.4.11
Adapter ORing
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Detailed Design Procedure
9.2.1.1.1
Input Bridges and Schottky Diodes
9.2.1.1.2
Input TVS Protection
9.2.1.1.3
Input Bypass Capacitor
9.2.1.1.4
Detection Resistor, RDEN
9.2.1.1.5
Classification Resistor, RCLS.
9.2.1.1.6
Dead Time Resistor, RDT
9.2.1.1.7
APD Pin Divider Network, RAPD1, RAPD2
9.2.1.1.8
Setting Frequency (RFRS) and Synchronization
9.2.1.1.9
Bias Supply Requirements and CVCC
9.2.1.1.10
APDO, T2P Interface
9.2.1.1.11
Secondary Soft Start
9.2.1.1.12
Frequency Dithering for Conducted Emissions Control
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
11.3
EMI Containment
11.4
Thermal Considerations and OTSD
11.5
ESD
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RMT|45
MPQF583
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvser8a_oa
slvser8a_pm
1
Features
Complete IEEE 802.3bt Type 3 (Class
1-4
)
and 802.3at
PoE PD Solution
EA Gen 2 Logo-Ready (PoE 2 PD Controller)
Robust 100 V, 0.3 Ω (typ) Hotswap MOSFET
Supports Power Levels for up to
30-W
Operation
Integrated PWM Controller for Flyback
or Active Clamp Forward
Configuration
Flyback Control with Primary-Side Regulation
Supports CCM Operation
±1.5% (typ, 5-V Output) Load Regulation (0-100% load range) — with Sync FET
±3% (typ, 12-V Output) Load Regulation (5-100% load range) — Diode Rectified
Also supports secondary-side regulation
Soft-Start Control with Advanced Startup and Hiccup Mode Overload Protection
Soft-Stop Shutdown
Adjustable Frequency with Synchronization
Programmable Frequency Dithering for EMI
Automatic
Maintain Power Signature (MPS)
Auto-adjust to PSE Type and Load Current with Auto-stretch
Primary Adapter Priority Input
–40°C to 125°C Junction Temperature Range