SCPS192E
April 2009 – January 2023
TCA6408A
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
I2C Interface Timing Requirements
6.7
Reset Timing Requirements
6.8
Switching Characteristics
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
Voltage Translation
8.3.2
I/O Port
8.3.3
Interrupt Output ( INT)
8.3.4
Reset Input ( RESET)
8.4
Device Functional Modes
8.4.1
Power-On Reset (POR)
8.4.2
Powered-Up
8.5
Programming
8.5.1
I2C Interface
8.5.2
Bus Transactions
8.5.2.1
Writes
8.5.2.2
Reads
8.6
Register Map
8.6.1
Device Address
8.6.2
Control Register and Command Byte
8.6.3
Register Descriptions
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Minimizing ICC When I/O is Used to Control LEDs
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
Power-On Reset Requirements
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|16
MPDS361A
RSV|16
MPQF205F
RGT|16
MPQF119H
Thermal pad, mechanical data (Package|Pins)
RGT|16
QFND005T
Orderable Information
scps192e_oa
scps192e_pm
1
Features
I
2
C to Parallel port expander
Operating power-supply voltage range of 1.65 V to 5.5 V
Allows bidirectional voltage-level translation and gpio expansion between 1.8-V, 2.5-V, 3.3-V, and 5-V I
2
C bus and P-ports
Low standby current consumption of 1 μA
5-V Tolerant I/O ports
400-kHz Fast I
2
C bus
Hardware address pin allows two TCA6408A Devices on the same I
2
C/SMBus bus
Active-low reset (
RESET
) input
Open-drain active-low interrupt (
INT
) output
Input and output configuration register
Polarity inversion register
Internal power-on reset
Power up with all channels configured as inputs
No glitch on power up
Noise filter on SCL and SDA inputs
Latched outputs with high-current drive maximum capability for directly driving LEDs
Latch-up performance exceeds 100 mA Per JESD 78, class II
Schmitt-trigger action allows slow input transition and better switching noise immunity at the SCL and SDA inputs
ESD Protection exceeds JESD 22
2000-V Human body model (A114-A)
1000-V Charged-device model (C101)