SCPS178C July   2007  – April 2022 PCA9306-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Switching Characteristics: Translating Down, VIH = 3.3 V
    7. 7.7  Switching Characteristics: Translating Down, VIH = 2.5 V
    8. 7.8  Switching Characteristics: Translating Up, VIH = 2.3 V
    9. 7.9  Switching Characteristics: Translating Up, VIH = 1.5 V
    10. 7.10 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
      1. 9.1.1 Definition of threshold voltage
      2. 9.1.2 Correct Device Set Up
      3. 9.1.3 Disconnecting a Target from the Main I2C Bus Using the EN Pin
      4. 9.1.4 Supporting Remote Board Insertion to Backplane with PCA9306-Q1
      5. 9.1.5 Switch Configuration
      6. 9.1.6 Controller on Side 1 or Side 2 of Device
      7. 9.1.7 LDO and PCA9306-Q1 Concerns
      8. 9.1.8 Current Limiting Resistance on VREF2
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Enable (EN) Pin
      2. 9.3.2 Voltage Translation
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 General Applications of I2C
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Bidirectional Translation
        2. 10.2.2.2 Sizing Pullup Resistor
        3. 10.2.2.3 PCA9306-Q1 Bandwidth
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • AEC-Q100 qualified for automotive applications
    • Temperature grade 2: –40°C to 105°C, TA
    • HBM ESD classification level H2
    • CDM ESD classification level C4B
  • 2-Bit bidirectional translator for SDA and SCL lines in mixed-mode I2C applications
  • Compatible with I2C and SMBus
  • Less than 1.5-ns maximum propagation delay to accommodate standard-mode and fast-mode I2C devices and multiple controllers
  • Allows voltage-level translation between
    • 1.2-V VREF1 and 1.8-V, 2.5-V, 3.3-V, or 5-V VREF2
    • 1.8-V VREF1 and 2.5-V, 3.3-V, or 5-V VREF2
    • 2.5-V VREF1 and 3.3-V, or 5-V VREF2
    • 3.3-V VREF1 and 5-V VREF2
  • Provides bidirectional voltage translation with no direction pin
  • Low 3.5-Ω ON-state connection between input and output ports provides less signal distortion
  • Open-drain I2C I/O Ports (SCL1, SDA1, SCL2, and SDA2)
  • 5-V tolerant I2C I/O ports to support mixed-mode signal operation
  • High-impedance SCL1, SDA1, SCL2, and SDA2 pins for EN = low
  • Lock-up-free operation for isolation when EN = Low
  • Flow-through pinout for ease of printed-circuit board trace routing
  • Latch-up performance exceeds 100 mA Per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000-V Human-body model (A114-A)
    • 200-V Machine model (A115-A)
    • 1000-V Charged-device model (C101)