SNVSA77D December   2015  – November 2016 LP5912

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Voltage Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Output and Input Capacitors
  8. 8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Enable (EN)
      2. 9.3.2 Output Automatic Discharge (RAD)
      3. 9.3.3 Reverse Current Protection (IRO)
      4. 9.3.4 Internal Current Limit (ISC)
      5. 9.3.5 Thermal Overload Protection (TSD)
      6. 9.3.6 Power-Good Output (PG)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Enable (EN)
      2. 9.4.2 Minimum Operating Input Voltage (VIN)
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 External Capacitors
        2. 10.2.2.2 Input Capacitor
        3. 10.2.2.3 Output Capacitor
        4. 10.2.2.4 Capacitor Characteristics
        5. 10.2.2.5 Remote Capacitor Operation
        6. 10.2.2.6 Power Dissipation
        7. 10.2.2.7 Estimating Junction Temperature
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Input Voltage Range: 1.6 V to 6.5 V
  • Output Voltage Range: 0.8 V to 5.5 V
  • Output Current up to 500 mA
  • Low Output-Voltage Noise: 12 µVRMS Typical
  • PSRR at 1 kHz: 75 dB Typical
  • Output Voltage Tolerance (VOUT ≥ 3.3 V): ±2%
  • Low IQ (Enabled, No Load): 30 µA Typical
  • Low Dropout (VOUT ≥ 3.3 V): 95 mV Typical at 500-mA Load
  • Stable With 1-µF Ceramic Input and Output Capacitors
  • Thermal-Overload and Short-Circuit Protection
  • Reverse Current Protection
  • No Noise Bypass Capacitor Required
  • Output Automatic Discharge for Fast Turnoff
  • Power-Good Output With 140-µs Typical Delay
  • Internal Soft-Start to Limit the In-rush Current
  • –40°C to +125°C Operating Junction Temperature Range

2 Applications

  • Camera Modules
  • Sensors
  • HiFi Audio Radio Transceivers
  • PLL/Synthesizer, Clocking
  • Medium-Current, Noise-Sensitive Applications

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3 Description

The LP5912 is low-noise LDO that can supply up to 500 mA of output current. Designed to meet the requirements of RF and analog circuits, the LP5912 device provides low noise, high PSRR, low quiescent current, and low line and load transient response. The LP5912 offers class-leading noise performance without a noise bypass capacitor and with the ability for remote output capacitance placement.

The device is designed to work with a 1-µF input and a 1-µF output ceramic capacitor (no separate noise bypass capacitor required).

This device is available with fixed output voltages from 0.8 V to 5.5 V in 25-mV steps. Contact Texas Instruments Sales for specific voltage option needs.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
LP5912 WSON (6) 2.00 mm × 2.00 mm
  1. For all available packages, see the Package Option Addendum (POA) at the end of this data sheet.

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Simplified Schematic

LP5912 simpschem_snvsa77.gif